1. Field of the Invention
The present invention relates to a semiconductor device and a manufacturing method therefore and, more particularly, to a semiconductor device having a trench gate structure and a manufacturing method therefore.
2. Description of the Related Art
Semiconductor devices having a trench gate structure in which gate insulating film is formed on a side wall of a trench formed in one surface of a semiconductor substrate and in which a gate electrode is embedded in the trench are known.
In some of the semiconductor devices as described above, the gate insulating film comprises laminate film formed of silicon oxide film, silicon nitride film and silicon oxide film, referred to as ONO (Oxide Nitride Oxide) film. By forming the gate insulating film of the ONO film, each of these semiconductor devices has a higher gate withstand voltage than a semiconductor device whose gate insulating film is formed of only silicon oxide film (for example, JP-A-2001-196587).
Furthermore, in a process of manufacturing a semiconductor device having a trench gate structure as described above, a gate electrode is generally formed of polysilicon doped with impurities such as B (boron), P (phosphorous) or the like. After the gate electrode is formed, interlayer insulating film is formed on the gate electrode, and a heat treatment is carried out to flatten the interlayer insulating film. When an impurity diffused layer for a source region or the like is form ed after the gate electrode is formed, ion implantation is conducted to form a source region and etc. after the gate electrode is formed, and a heat treatment is conducted to diffuse the impurities.
In the manufacturing process described above, particularly when P+-type polysilicon doped with boron is used as a gate electrode, when the heat treatment is conducted after the formation of the gate electrode, boron contained in the gate electrode may be diffused into the gate insulating film. Accordingly, the film quality of the gate insulating film is deteriorated, which may result in a withstanding voltage of the gate insulating film that is lower than a set value.